07 Aug 2023
Hands - on Analog and Digital IC Design using Cadence Tools
School of ECE organized a Five Day FDP On
“Hands - on Analog and Digital IC Design using Cadence Tools” 7th August 2023 to 11th August 2023.
This workshop will give exposure to Analog and Digital VLSI Design Logic to Layout, aim to introduce the most demand skills in VLSI. This FDP deals with the fundamental theory to Practical hand on training in VLSI and it is lead by industry experts, which would provide Participants to learn from the scratch to write code, design using the CMOS transistors which help them to manage their projects efficiently and make the career as a VLSI design engineer.
The following technical and hands on topics are covered by our experts
- Introduction to Full Custom and Semi-Custom IC Design Flow
- Cadence Solutions for Full Custom and Semicustom IC Design
- Test bench Creation using Virtuoso Schematic Editor
- Functional Simulation using Spectre
- Layout Design using Virtuoso Layout Editor
- Physical Verification which includes DRC & LVS
- Post Layout Simulation
- RTL Synthesis using Genus Synthesis Solution
- Physical Implementation using Innovus that includes
- Floor Planning ✔ Power Planning ✔ Placement ✔ CTS ✔ Routing
- Timing Analysis
- Power Analysis
- Parasitic Extraction
- Generation of GDSII
Hands - on Analog and Digital IC Design using Cadence Tools
